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PULSEâ„¢ pre-silicon host runtimev0.8.4-alphaGRID=4 host

PULSE SDK — Pre-silicon host runtime

Host-side programming interface, ISA word packer, and numeric golden for the Stallion GRID=4 instance. Not a device driver. Not foundry GDS. Public tree: github.com/fairviewsemiconductor/pulse-sdk. torch.compile backend="pulse" is not in this release.

View on GitHub (fairviewsemiconductor/pulse-sdk) ›Release v0.8.4-alpha Notes ›Request Pre-Silicon Emulator Key ›
pulse-sdk-quickstart.sh
# PULSE pre-silicon host runtime (GRID=4)
git clone https://github.com/fairviewsemiconductor/pulse-sdk.git
cd pulse-sdk
# Host wrapper smoke tests. Does not run RTL or OpenLane.
# Not in this release: torch.compile(..., backend="pulse")
./SDK/pulse/run_all_tests.sh
Core Architectural Dialects

PULSEâ„¢ Modular Subsystems

pack_mma / pack_dmaThis release

Host ISA packers A1 / B1

In this release: host word packing for DMA opcode A1 and MMA opcode B1. GRID=4 numeric goldens.

pulse-optNot in this release

MLIR optimizer

Not in this release: pulse-opt MLIR lowering is not a production compiler.

pulse-moeNot in this release

Elastic MoE engine

Not in this release: pulse-moe and FreeToken-as-hardware are not this SDK drop.

pulse-simNot in this release

Virtual platform

Not in this release: cycle-accurate pulse-sim is not this SDK drop.

pulse-runtimeNot in this release

CXL 3.1 driver

Not in this release: zero-copy CXL 3.1 driver is not this SDK drop.

pulse-py (pre-silicon host runtime)
Host ISA packers and numeric goldens for the GRID=4 instance. torch.compile backend="pulse" is not in this release.
# PULSE pre-silicon host runtime
# https://github.com/fairviewsemiconductor/pulse-sdk
# Not in this release: torch.compile(model, backend="pulse")

from SDK.compiler.triton_lowering import pack_mma, pack_dma

mma = pack_mma(k=4)          # opcode B1
dma = pack_dma(0x10, 0x20, 8)  # opcode A1
print("packed host words", hex(mma), hex(dma))
Institutional Hardware & Compiler Diligence

Pre-Silicon Emulation Suite & Synthesizable RTL Access

Public tree: host runtime, ISA packers, GRID=4 goldens. pulse-opt, pulse-moe, cycle-accurate pulse-sim, and CXL 3.1 driver are not in this release. RTL evidence lives in the private diligence tree.

Request Access to Diligence Data Room (Under NDA) ›Read FreeToken commentary ›
FairView Semiconductor — Stallion AI MPU & Gallium HBM4